I need help with my assembly code

This segment below is giving me errror of expecting opcode or Macro $($both EQU and SET don't work$)$

; Subroutine to configure individual GPIO ports A and B

Configure$\_$GPIO$\_$Ports PROC

; Define base addresses for GPIO Ports A and B

GPIOA$\_$BASE EQU $0$x$40020000$

GPIOB$\_$BASE EQU $0$x$40020400$

; Define offsets for GPIO registers

MODER$\_$OFFSET EQU $0$x$00$

OTYPER$\_$OFFSET EQU $0$x$04$

OSPEEDR$\_$OFFSET EQU $0$x$08$

PUPDR$\_$OFFSET EQU $0$x$0$C

; Define values for GPIO registers

GPIOA$\_$MODER$\_$VALUE EQU $0$xA$8000000$ ; Corresponding to the configuration required for GPIO Port A

GPIOB$\_$MODER$\_$VALUE EQU $0$x$00000280$ ; Corresponding to the configuration required for GPIO Port B

GPIOA$\_$OTYPER$\_$VALUE EQU $0$x$00000000$ ; No open$-$drain output for GPIO Port A

GPIOB$\_$OTYPER$\_$VALUE EQU $0$x$00000000$ ; No open$-$drain output for GPIO Port B

GPIOA$\_$OSPEEDR$\_$VALUE EQU $0$x$0$C$000000$ ; High speed for GPIO Port A

GPIOB$\_$OSPEEDR$\_$VALUE EQU $0$x$000000$C$0$ ; High speed for GPIO Port B

GPIOA$\_$PUPDR$\_$VALUE EQU $0$x$64000000$ ; Pull$-$down for GPIO Port A

GPIOB$\_$PUPDR$\_$VALUE EQU $0$x$00000100$ ; Pull$-$down for GPIO Port B

My full; Vector Table $-$ mapped to address $0$ at reset.

AREA RESET, DATA, READONLY

EXPORT $\_\_$Vectors

$\_\_$Vectors

DCD $0$x$20010000$ ; Initial Stack pointer value $($place it at the start of RAM$).$

DCD Reset$\_$Handler ; Reset$\_$Handler location

; Code Section

AREA $|.$text$|,$ CODE, READONLY

EXPORT Reset$\_$Handler

Reset$\_$Handler PROC

; Initialize stack pointer to the top of the stack.

LDR SP$,=$stack$\_$top

; Configure RCC module to enable GPIOA and GPIOB subsystems

BL Configure$\_$GPIO

; Configure individual GPIO ports

BL Configure$\_$GPIO$\_$Ports

; Main loop

Main BL Read$\_$GPIO$\_$Inputs

BL Decode$\_$Inputs

BL LED$4\_$Operation

BL LED$3\_$Operation

BL Delay$50$ms

B Main

ENDP

; Subroutine to configure RCC module to enable GPIOA and GPIOB subsystems

Configure$\_$GPIO PROC

; Read$-$modify$-$write to RCC$\_$AHB$1$RSTR register

LDR R$0,=0$x$40023810$ ; RCC$\_$AHB$1$RSTR register address

LDR R$1,[$R$0]$ ; Read the current value

ORR R$1,$ R$1,$ #$0$x$03$ ; Set corresponding bits for GPIOA and GPIOB

STR R$1,[$R$0]$ ; Write back the modified value

; Read$-$modify$-$write to RCC$\_$AHB$1$ENR register

LDR R$0,=0$x$40023830$ ; RCC$\_$AHB$1$ENR register address

LDR R$1,[$R$0]$ ; Read the current value

ORR R$1,$ R$1,$ #$0$x$03$ ; Set corresponding bits for GPIOA and GPIOB

STR R$1,[$R$0]$ ; Write back the modified value

; Implement delay to ensure GPIO reset is successful

NOP

NOP

BX LR ; Return from subroutine

ENDP

; Subroutine to configure individual GPIO ports A and B

Configure$\_$GPIO$\_$Ports PROC

; Define base addresses for GPIO Ports A and B

GPIOA$\_$BASE EQU $0$x$40020000$

GPIOB$\_$BASE EQU $0$x$40020400$

; Define offsets for GPIO registers

MODER$\_$OFFSET EQU $0$x$00$

OTYPER$\_$OFFSET EQU $0$x$04$

OSPEEDR$\_$OFFSET EQU $0$x$08$

PUPDR$\_$OFFSET EQU $0$x$0$C

; Define values for GPIO registers

GPIOA$\_$MODER$\_$VALUE EQU $0$xA$8000000$ ; Corresponding to the configuration required for GPIO Port A

GPIOB$\_$MODER$\_$VALUE EQU $0$x$00000280$ ; Corresponding to the configuration required for GPIO Port B

GPIOA$\_$OTYPER$\_$VALUE EQU $0$x$00000000$ ; No open$-$drain output for GPIO Port A

GPIOB$\_$OTYPER$\_$VALUE EQU $0$x$00000000$ ; No open$-$drain output for GPIO Port B

GPIOA$\_$OSPEEDR$\_$VALUE EQU $0$x$0$C$000000$ ; High speed for GPIO Port A

GPIOB$\_$OSPEEDR$\_$VALUE EQU $0$x$000000$C$0$ ; High speed for GPIO Port B

GPIOA$\_$PUPDR$\_$VALUE EQU $0$x$64000000$ ; Pull$-$down for GPIO Port A

GPIOB$\_$PUPDR$\_$VALUE EQU $0$x$00000100$ ; Pull$-$down for GPIO Port B

; Configure GPIO Port A

LDR R$0,=$GPIOA$\_$BASE

; Configure MODER register

LDR R$1,=$GPIOA$\_$MODER$\_$VALUE

STR R$1,[$R$0,$ #MODER$\_$OFFSET$]$

; Configure OTYPER register

LDR R$1,=$GPIOA$\_$OTYPER$\_$VALUE

STR R$1,[$R$0,$ #OTYPER$\_$OFFSET$]$

; Configure OSPEEDR register

LDR R$1,=$GPIOA$\_$OSPEEDR$\_$VALUE

STR R$1,[$R$0,$ #OSPEEDR$\_$OFFSET$]$

; Configure PUPDR register

LDR R$1,=$GPIOA$\_$PUPDR$\_$VALUE

STR R$1,[$R$0,$ #PUPDR$\_$OFFSET$]$

; Configure GPIO Port B

LDR R$0,=$GPIOB$\_$BASE

; Configure MODER register

LDR R$1,=$GPIOB$\_$MODER$\_$VALUE

STR R$1,[$R$0,$ #MODER$\_$OFFSET$]$

; Configure OTYPER register

LDR R$1,=$GPIOB$\_$OTYPER$\_$VALUE

STR R$1,[$R$0,$ #OTYPER$\_$OFFSET$]$

; Configure OSPEEDR register

LDR R$1,=$GPIOB$\_$OSPEEDR$\_$VALUE

STR R$1,[$R$0,$ #OSPEEDR$\_$OFFSET$]$

; Configure PUPDR register

LDR R$1,=$GPIOB$\_$PUPDR$\_$VALUE

STR R$1,[$R$0,$ #PUPDR$\_$OFFSET$]$

BX LR ; Return from subroutine

ENDP

; Subroutine to read GPIO inputs

Read$\_$GPIO$\_$Inputs PROC

; Implement GPIO read operations here

; Update switch states in code below