I need help with Problems 3 and 4. Problem 3) Sketch the instruction memoryfor these two instructions by defining the memory address and value for each hex machine code byte. Problem 4 sketch the data memory for these two words by defining the memory address and byte values for each memory cell. You can fill in the relevant blanks in the figure on the right or create your own similar sketch

3. An ARM controller fetches &executes the following two 2 16-bit instructions address data (hex machine code) in the order shown below. lgnore pipelining and assume fetch and execute happen together. ox0001 0x0001. 0x0001. 0x0001. 0x0001. 0x0001. 0x57A0 0xD288 After execution of these two instructions, the PC holds 0x0001.020A. Sketch the instruction memory for these two instructions by defining the memory address and value for each hex machine code byte. Note that ARM instruction fetches are little endian. You can fill in the relevant blanks in the figure on the right or create your own similar sketch 4. The following two 32-bit words are stored to 8-bit memory, in sequence, using big endian 0x15D277A0 0xE42B1B08 If these values are stored in RAM starting at 0x2000.0FA2, sketch the data memory for these two words by defining the memory address and byte values for each memory cell. You can fill in the relevant blanks in the figure on the right or create your own similar sketch address data 0x2000. 0x2000._ 0x2000. 0x2000._ 0x2000. 0x2000. ox2000. 0x2000. 0x2000. 0x2000. Please study Module 4, Part 1 course notes to complete the following problems 5. Briefly describe Assembly Language 6. Briefly describe the Edit, Build, and Debug operations implemented within an Integrated Development Environment. 7. List the four elements of an Assembly instruction and briefly define each 8. Compare Register, Immediate, and Indexed address modes by describing one feature that is unique to each mode 3. An ARM controller fetches &executes the following two 2 16-bit instructions address data (hex machine code) in the order shown below. lgnore pipelining and assume fetch and execute happen together. ox0001 0x0001. 0x0001. 0x0001. 0x0001. 0x0001. 0x57A0 0xD288 After execution of these two instructions, the PC holds 0x0001.020A. Sketch the instruction memory for these two instructions by defining the memory address and value for each hex machine code byte. Note that ARM instruction fetches are little endian. You can fill in the relevant blanks in the figure on the right or create your own similar sketch 4. The following two 32-bit words are stored to 8-bit memory, in sequence, using big endian 0x15D277A0 0xE42B1B08 If these values are stored in RAM starting at 0x2000.0FA2, sketch the data memory for these two words by defining the memory address and byte values for each memory cell. You can fill in the relevant blanks in the figure on the right or create your own similar sketch address data 0x2000. 0x2000._ 0x2000. 0x2000._ 0x2000. 0x2000. ox2000. 0x2000. 0x2000. 0x2000. Please study Module 4, Part 1 course notes to complete the following problems 5. Briefly describe Assembly Language 6. Briefly describe the Edit, Build, and Debug operations implemented within an Integrated Development Environment. 7. List the four elements of an Assembly instruction and briefly define each 8. Compare Register, Immediate, and Indexed address modes by describing one feature that is unique to each mode