I need help with this assignment on Boolean Expression:(How to plot the gates on multisim software)

F(a, b, c, d) = A'B'D + A'B + ACD

Use a K-Map to reduce the given function. Then use it to create a truth table

Implement both original function and the reduce function using logic gates on a multisim

Please Feed both circuits of each function with the same inputs (clocks or word generator). Also feed a logic analyzer with theses inputs and both outputs. Note that the outputs should track if the circuits are designed and implemented correctly.

Thank you