I need implementation this citcuit on LOGISM

V C Branch N-Control z IR(8:6) ||IR (2:0) Extend PC Jump Address PJB LBC Address Instruction memory Instruction RW D DA-Register file BBA AA-A Constant Zero fill IR (2:0) Instruction decoder 10 MUXB MB Address out Bus A Bus B Data out MW DB AMFMRMP JB A A ABSDWWLBC CONTROL A B FS V Data in Address Data memory Function unit Data out F Data in 01 MD-- MUXD Bus D DATAPATH Figure 2: Block Diagram of a single-cycle computer. V C Branch N-Control z IR(8:6) ||IR (2:0) Extend PC Jump Address PJB LBC Address Instruction memory Instruction RW D DA-Register file BBA AA-A Constant Zero fill IR (2:0) Instruction decoder 10 MUXB MB Address out Bus A Bus B Data out MW DB AMFMRMP JB A A ABSDWWLBC CONTROL A B FS V Data in Address Data memory Function unit Data out F Data in 01 MD-- MUXD Bus D DATAPATH Figure 2: Block Diagram of a single-cycle computer