Assume an 8-bit word sized 2K byte of memory. The number of address lines required to...

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Assume an 8-bit word sized 2K byte of memory. The number of address lines required to decode this memory is: Select one: O a. none of the given options O b. 10 lines. O . 11 lines. O d. 8 lines. O e. 2048 line. The module is the smallest building block in Verilog Select one: O True OFalse Which of the following uses a fixed OR array and a programmable AND array. Select one: O a. None of the given options O b. PAL O c. ROM O d. PLA O e. RAM Assume an 8-bit word sized 2K byte of memory. The number of address lines required to decode this memory is: Select one: O a. none of the given options O b. 10 lines. O . 11 lines. O d. 8 lines. O e. 2048 line. The module is the smallest building block in Verilog Select one: O True OFalse Which of the following uses a fixed OR array and a programmable AND array. Select one: O a. None of the given options O b. PAL O c. ROM O d. PLA O e. RAM