I need more help with the math portion of the answer given below. Please provide very detailed steps in the response.

A one-level cache system contains a SRAM cache that is n times faster than the main memory. The cache has an access time T and its miss rate is m. Show that this system will provide an average memory access speed up of n/(1 + mn). Irrespective of how fast the cache hardware is, show that the speed up has an upper bound 1/m. (4 points)

Answer:

Average access time for a one-level cache system is given by,

t = T + (1 - h) nT = T + mnT

where nT and T are cycle times of the main memory and cache, respectively, and h = 1 - m is the hit rate.

Therefore,

nT nT n

Speed up = = =

t T + mnT 1 + mn

If we let the cache be infinitely faster than the main memory, then

n 1

Speed up = Lim = Lim = 1/m

n 1 + mn n (1/n) + m