Question: I need the answer for ONLY QUESTION 6. But i uploaded question 5 as well because you may require question 5 to solve question 6.

I need the answer for ONLY QUESTION 6. But i uploaded question 5 as well because you may require question 5 to solve question 6.

I need the answer for ONLY QUESTION 6. But i uploaded question

5 as well because you may require question 5 to solve question

Question 5 (10 marks) The pipelined MIPS implementation in Question 4 can be modified to resolve data hazards through Forwarding. Draw a possible internal circuit diagram of the Forwarding Unit shown in the datapath below. IDEX WB EX/MEM Control M WB MEMWB IF/ID M EX WB 1 Instruction Registers ALU PC Instruction memory Data memory IF/ID. Registers IF/ID. Register IF/ID. Register IF/ID. RegisterRd Rs Rt RI Rd EXMEM. Registered Forwarding unit MEMWB. RegisterRd Question 6 (10 marks) Consider the same datapath in Question 5, how can the register file be modified to resolve the data dependence between the first and fourth instructions in the following program? To demonstrate this modification, design a register file containing four two-bit registers. Time (in clock cycles) Value of CC 1 CC 2 CC3 CC 4 CC 5 CC 6 CC 7 CC 8 CC 9 register $2: 10 10 10 10 10720 -20 -20 -20 -20 Program execution order (in instructions) sub $2, $1, $3 Reg! TOME Reg IM ap and $12, $2, $5 IM Reg! DM Reg or $13, $6, $2 IM Reg DM Reg add $14, $2,52 IM Reg TDM- Reg sw $15, 100($2) IM HERE Reg 3 Question 5 (10 marks) The pipelined MIPS implementation in Question 4 can be modified to resolve data hazards through Forwarding. Draw a possible internal circuit diagram of the Forwarding Unit shown in the datapath below. IDEX WB EX/MEM Control M WB MEMWB IF/ID M EX WB 1 Instruction Registers ALU PC Instruction memory Data memory IF/ID. Registers IF/ID. Register IF/ID. Register IF/ID. RegisterRd Rs Rt RI Rd EXMEM. Registered Forwarding unit MEMWB. RegisterRd Question 6 (10 marks) Consider the same datapath in Question 5, how can the register file be modified to resolve the data dependence between the first and fourth instructions in the following program? To demonstrate this modification, design a register file containing four two-bit registers. Time (in clock cycles) Value of CC 1 CC 2 CC3 CC 4 CC 5 CC 6 CC 7 CC 8 CC 9 register $2: 10 10 10 10 10720 -20 -20 -20 -20 Program execution order (in instructions) sub $2, $1, $3 Reg! TOME Reg IM ap and $12, $2, $5 IM Reg! DM Reg or $13, $6, $2 IM Reg DM Reg add $14, $2,52 IM Reg TDM- Reg sw $15, 100($2) IM HERE Reg 3

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