I only need help with 2.4-2.6. Please note that the third cache reference is different than the one found in the original question, here: http://www.chegg.com/homework-help/questions-and-answers/direct-mapped-cache-design-32-bit-address-following-bits-address-used-access-cache-cache-b-q11677151

2. (5.3) For a direct-mapped cache design with a 32-bit address, the following bits of the address are used to access the cache. 31 10 95 4-0 2.1 What is the cache block size (in words)? How many entries does the cache have? What is the ratio between total bits required for such a cache implementation over the data storage Answer: 2.2 Answer: 2.3 bits? Answer: Starting from power on, the following byte-addressed cache references are recorded 046 How many blocks are replaced? 6 132 232 160 1024 30 1403100180 2180 2.4