II$.(21$ points$)$ Assume that all registers are $8$ bits wide and that all operations are $8-$bit operations. Show the

hardware components and the needed interconnections to realize the following RTL specification of a digital

subsystem. $($Hint: Note the four control signals T$1,$ T$2,$ a $,$ and $.$ Some of these should be used as multiplexer select

inputs, while others should be used as the load inputs of registers R$1$ and R$2.$ Your solution should resemble the

examples shown at the end of the "Register Transfer Language" lecture notes.$)$T$1\backslash$alpha $\text{'}$ : R$1$R$2//$ register copy

T$1\backslash$alpha : R$1$R$1+$ R$2//$ addition

T$2\backslash$beta $\text{'}$ : R$2$R$1//$ register copy

T$2\backslash$beta : R$2$R$1+$ R$2//$ addition