Design a combinational logic circuit using VHDL coding that executes the following arithmetic and logic unit (ALU) functions for the given inputs for registers A and B, which are 8 bits each: S 0 0 0 0 0 0 0 0 1 1 1 1 TABLE 8-2 Function Table for ALU Operation Select S 0 0 0 0 1 1 1 1 X X X X So 0 0 1 0 0 1 1 0 0 1 1 Cin 0 1 0 1 0 1 0 1 0 1 0 1 Operation G = A G = A + 1 G = A + B G = A + B + 1 G = A + B G = A + B + 1 G=A-1 G = A G=AAB G=AV B G = A + B G = A Function Transfer A Increment A Addition Add with carry input of 1 A plus 1s complement of B Subtraction Decrement A Transfer A AND OR XOR NOT (Is complement) (a) Show and explain your VHDL code (25 points). (b) Show that your VHDL code is synthesized successfully (25 points). (c) Show and describe the RTL schematics (register transfer level circuit) of your ALU (25 points). (d) Prepare a simulation code that tests each functionality. Explain the functionality using the behavioral model (25 points).