Question: In the 4-stage shift register shown, serial output is fed back as serial input. Initially register contents (Q outputs) ABCD are 0100 it takes how

In the 4-stage shift register shown, serial output is fed back

In the 4-stage shift register shown, serial output is fed back as serial input. Initially register contents (Q outputs) ABCD are 0100 it takes how many clock pulses for a 1 to appear on serial output for the first time

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