The 4-bit shift register shown in Figure 2 generates the XOR of parallel outputs B and D and feeds the result back to the serial input at each clock cycle. This modifies the 4 bit parallel output sequence from the shift register to create a new 4-bit output. Assume that the starting pattern for the shift register contents, A, B, C, D are 0 10 1. Determine the sequence of 4-bit output patterns, beginning with 0 1 0 1, that will be generated by this shift register at each clock cycle. Continue until the pattern repeats. How many unique 4-bit patterns are generated? The modified circuit in Figure 3 shows C and D are XORed together. Repeat the exercise with the same start pattern. How many unique 4-bit patterns are generated before the cycle repeats