Question: In the pipeline processor example, the instruction frequency is: Branch is 20% and 70% of all branches are taken Load is 15% Store is 10%

In the pipeline processor example, the instruction frequency is: Branch is 20% and 70% of all branches are taken Load is 15% Store is 10% ALU/Shift is 50% Assuming: When the processor detects the branch instruction it will assume taken immediately instead of waiting until write stage. the branch target address can be calculated at the same time as the branch is detected. All other instruction type has the perfect CPI = 1 Question: what is the expected CPI of this processor due to branch execution
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