Question: In the single cycle implementation of the MIPS datapath every instruction must go through all the stages, but not every instruction has something to do

In the single cycle implementation of the MIPS datapath every instruction must go through all the stages, but not every instruction has something to do in the stage, so it just wastes time. Of the following execution stages, which one(s) are used by every instruction?
Question 1 options:
Fetch
I/O
Execute
Memory
Writeback
Decode

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