In this problem the various wire models and their respective accuracies will be studied $($ignore distributed RC model$).$ a$.$ Compute the $0\%-50\%$ delay of a $500$um x $0\mathrm{.}5$um wire with sheet resistance of $0\mathrm{.}08\backslash$Omega $,$ with area capacitance of $30$aF$/$um$2,$ and fringing capacitance of $40$aF$/$um$.$ Assume the driver has a $100$ capacitance. $$ Using a lumped model for the wire. $$ Using a PI model for the wire, and the Elmore equations to find tau $($see Figure $4\mathrm{.}26$ in Chapter $4$ of the textbook$).$ Using the distributed RC line equations from Section $4\mathrm{.}4\mathrm{.}4$ in Chapter $4$ of the textbook. b$.$ Compare your results in part a$.$ using spice $($be sure to include the source resistance$).$ For each simulation, measure the $0\%-50\%$ time for the output. $$ First, simulate a step input to a lumped R$-$C circuit. $$ Next, simulate a step input to your wire as a PI model. $$ Unfortunately, our version of SPICE does not support the distributed RC model as described in your book $($Section $4\mathrm{.}5\mathrm{.}1$ in Chapter $4$ of the textbook$).$ Instead, R$1$AA C$1$ R$3$ R$2$ C$2$ R$4$ C$4$ C$3$ R$6$ R$5$ C$5$ R$7$ C$7$ C$6$ R$8$ C$8$ BA simulate a step input to your wire using a PI$3$ distributed RC model