In this problem, we are going to study how adding increasing number of cores in a system in a practical system modifies its speedup. Assume a single core has the following CPIs for each class of instructions: a 1. Load/Store(L/S)= 12 2. Arithmetic= 1 3. Branch=5 Each core runs on a 2GHz clock frequency Also assume that we are executing a program in our system comprising the following number of instructions: 1. Load/Store(L/S) = 1.28E9 (this is the same as writing 1.28 * 109) 2. Arithmetic= 2.56E9 3. Branch=2.56E8 Now, assume that, as the program is parallelized to run over multiple cores, the number of arithmetic and load/store instructions per core is divided by 0.7 xp (where p is the number of cores) but the number of branch instructions per processor remains the same. So for example if p=2, we divide the arithmetic and L/S instructions per core by 0.7*2=1.4 each. (Ideally, we would divide the above parallelable instructions just by p; but sometimes in real life, even the same class of instructions cannot be fully parallelized, hence the divide by 0.7 * p instead in this example) A) Find the total execution time for this program on p= 1, 2 and 4 cores, and show the relative speedup of the 2 and 4 cores result relative to the single core result. Accordingly, fill up the values in the table provided below p # arith inst. #L/S inst. # branch inst. cycles ex. time speedup 2.56E9 1.28E9 1 1 2 4 2.56E8 2.56E8 2.56E8 B) If the CPI of ONLY the arithmetic instructions was doubled, what would the impact be on the execution time of the program on p= 1, 2,4 processors? C) To what should the CPI of load/store instructions be reduced in order for a modified single core processor to match the performance of four core processor using the original CPI values? Hint: Equate the two different execution times and solve for the load/store CPI(