Instructions for solving the following problems:

Read the following instructions carefully and implement them for your answer:

$1-$ Organize your solutions showing all steps.

$2-$ Use a word document for writing your solutions then submit it as a pdf file.

$3-$ Hand writing is not allowed.

$4-$ Show the question number only with the solution.

$5-$ Only one file is to be submitted.

$6-$ There is only one attempt to submit your answers.

$7-$ The date to submit the file is restricted and will not be changed.

Q$1)$ Using Direct memory mapping find out the physical address split showing all steps $($i need a drawing for the maping$)$

if you know that Main memory size is $8$GB$,$ cache size is $2$MB and block size is $8$KB$.$

$(5$ points$)$

Q$2)$ Explain fully the write strategies and their types, which the CPU uses to modify

data word? $(5$ points$)$

Q$3)$ Consider a fully associative cache with $8$ cache blocks $($numbered $07)$ and the

following sequence of memory block requests:

$4,3,25,8,19,6,25,8,16,35,45,22,8,3,16,25,7$

If LRU $($Least Recently Used$)$ replacement policy is used, which cache block will have

memory block $7?$ Show all steps for your answer.