Question: It's 1 9 8 7 and Apple has just released the Macintosh II featuring a Motorola 6 8 0 3 0 processor. The 6 8

It's 1987 and Apple has just released the Macintosh II featuring a Motorola 68030 processor. The 68030 contains a state of the art 128 byte data-cache and uses byte-addressable memory. Having taken 370, you know there's more to cache design than just size, so you write a C program to help you determine the block size, number of blocks per set, and number of sets in the cache. You have a function ACCESS(char *) that loads the memory at the given pointer. Assume all variables other than the data[] array are stored in registers and that the cache has been cleared before each call to miss_rate(...). Assume data[0] is at the start of the cache block.
```
#define CACHE_SIZE XX
double miss_rate(int stride){
char data[CACHE_SIZE *2]; // note array is 2*cache size
for (int i =0; i stride; i++){
for (int j = i; j (CACHE_SIZE *2); j += stride){
ACCESS(data + j)
}
}
}
```
1. In order to test your code, you first run it on a 256 B fully-associative cache with 32 B blocks. You set the CACHE_SIZE macro to 256. Fill in the miss rate for each stride in the following table. Only answers in the table will be graded. Fractions are OK.[6] You now run your program on the Motorola 68030 processor with a 128 byte data-cache. You set the CACHE_SIZE macro to 128 and collect the following data
Using the above data answer the following questions and justify your answers.
2. What is the block size in bytes? [3]
3. What is the associativity of the cache? [3]
4. How many sets are there in the cache? [3]
It's 1 9 8 7 and Apple has just released the

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