Let F(A, B, C, D) = AB +A(C+D)(A + D) G(A, B, C, D)= B(CD+AD) + BD (c) (4 marks) Find the gate input cost (including the cost for inverters) for the implementation of F and G respectively using your results in part (b) above. (d) In hierarchical approach, Boolean functions F and G are implemented using three copies of a hierarchical component represented by Boolean function H(X,Y,Z). (i) (6 marks) By identifying patterns in F and G (note that negated subexpressions may be part of the pattern), write down the Boolean expression for the hierarchical function H, and draw the logic circuit diagram of such hierarchical component. (4 marks) Express Fusing H. Do the same for G. (3 marks) Draw a schematic diagram to show the hierarchical implementation of F and G. (ii) (iii) (iv) (3 marks) Find the gate input cost (not counting the cost for inverters) for the implementation of F and G respectively using your results in part (iii) above.