Question: Let's assume we are working with a CPU that has the following specifications . 8-bit word size a main memory of 6 locations (0 to

Let's assume we are working with a CPU that has the following specifications . 8-bit word size a main memory of 6 locations (0 to 5) .2 registers o one register R o one Condition Code register CC: a 3-bit register with bit GT, EQ and LT This register holds the results of the latest computed comparison. e.g. if memory > R, then CC will be 100. If memory > R, CC is 110 .the following instruction table: Opcode Argument Instruction value Stop execution 0001 Memory addressLoad from memory into R. 0010 Memory addressStore R into memory Memory address alue Add memory value to R 0100 Set R to argument value Compare memory value to R: If memory > R , then GT-1, else GT = 0 If memory R , then EQ-1, else EQ 0 If memory R, then CC will be 100. If memory > R, CC is 110 .the following instruction table: Opcode Argument Instruction value Stop execution 0001 Memory addressLoad from memory into R. 0010 Memory addressStore R into memory Memory address alue Add memory value to R 0100 Set R to argument value Compare memory value to R: If memory > R , then GT-1, else GT = 0 If memory R , then EQ-1, else EQ 0 If memory
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