Logic gates using memory (look-up table) Using the 2 lowest address pins as inputs (set A3 and Ato ground), implement a NAND gate using the ROM. Assume that the output pin is 0- 2. Logic gates using memory (look-up table) (a) For Section 2.2, include pictures showing/proving that the ROM chip indeed acts as a 2-input NAND gate. We expect 4 pictures in total - make sure that these pictures are well-labelled. Attach also the labelled Logisim file of the circuit