MIPS ASSEMBLY

(FIGURE 3.3)

Chapter 3 Arithmetic for Computers Multiplicand Shift left 64 bits Multiplier 64-bit ALU Shift right 32 bits Product Control test Write 64 bits GURE 3.3 First version of the multiplication hardware. The Multiplicand rie d Product register are all 64 bits wide, with only the Multiplier register containing 32 bits (Ap scribes ALU's.) The 32-bit multiplicand starts in the right half of the Multiplicand register andisi bit on each step. The multiplier is shifted in the opposite direction at each step. The algorihn a product initialized to O.Control decides when to shift the Multiplicand and Multiplicer rse write new values into the Product register equential Version of the Multiplication Algorithm ardware and is design mimics the algorithm we learned in grammar s e hardware. We have drawn the hardware so that data flows school; Figure from top to b resemble more closely the paper-and-pencil method. Let's assume that the multiplier is in the 32-bit Multiplier reg Product register is initialized to 0. From the paper-and egister and thu d pencil example dded to the int ll need to move the multiplicand left one cu d left one digit each step