MIPS Assembly Language Design a. P&H(2.21) <2.6>.

Provide a minimal set of MIPS instructions that may be used to implement the following pseudoinstruction [Weve talked about pseudoinstructions before with mov. Effectively they are assembly instructions that arent actually in the ISA of hardware, so the assembler has to translate them into another machine instruction or series of machine instructions.]: not $t1, $t2 // bit-wise invert

b. You are tasked with adding a new pseudoinstruction that takes the twos complement of a registers value: ttc $t1 // takes the twos complement of $t1 Give a minimal implementation. Should this instruction produce any exceptions (i.e., can it produce any errors)? If so, what are they and does your implementation handle them?

c. Why does MIPS not have blt, blte, bgt, etc. instructions in its ISA? Provide a technical justification.