MIPS: The Single-Cycle Implementation

Figure 4.17

Suppose we want to add the MBV ("Move Biggest Value") instruction to the instruction set directly supported by the single-cycle implementation of Fig. 4.17 (P&H p. 322). MBV loads register RD with the largest value from either RS or RT a) Specify the values of the control signals (from the "control egg") that must be asserted to directly b) Specify the values of the ALU control output signals (i.e., the four-bit "Operation" specified by c) Describe any new control signals that must be added to the control egg" to support the MBV d) Sketch the hardware that must be added to Fig. 4.17 to support the MBV instruction, if any. support the MBV instruction. the "ALU control egg") that must be asserted to directly support the MBV instruction. Clearly label the inputs to the new hardware and indicate exactly how and where the outputs are used Suppose we want to add the MBV ("Move Biggest Value") instruction to the instruction set directly supported by the single-cycle implementation of Fig. 4.17 (P&H p. 322). MBV loads register RD with the largest value from either RS or RT a) Specify the values of the control signals (from the "control egg") that must be asserted to directly b) Specify the values of the ALU control output signals (i.e., the four-bit "Operation" specified by c) Describe any new control signals that must be added to the control egg" to support the MBV d) Sketch the hardware that must be added to Fig. 4.17 to support the MBV instruction, if any. support the MBV instruction. the "ALU control egg") that must be asserted to directly support the MBV instruction. Clearly label the inputs to the new hardware and indicate exactly how and where the outputs are used