Question: Model a decimal down counter using the while loop in Verilog. The counter should count from 36 down to 15 with a step of -

Model a decimal down counter using the while loop in Verilog. The counter should count from 36 down to 15 with a step of - 3. Comment the code. (15 points) (10 a. Insert the Verilog code of the counter and comment it. points) b. Insert a screenshot of the simulation. Print your name in the output file (log). (5 points)

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