Modify the finite state machine from the previous problem such that it only detects non-overlapping patterns of "010". For example, for the following input sequence we would have the following output:

Input Sequence M (starting from left to right) - 000101001011 Output Sequence R (starting from left to right) - 000010000100 Hint: Notice the difference in the FSM output compared to Problem 2 for the same input sequence.

1. Develop an abstract FSM design that solves the problem (include specific input bit values for each transition as well as the output bit in each state). Your states should be labeled with state names as well as state bit/output combinations and input bits on transitions.

2. Fill in K-maps for the next state values S1+, and S0+ based on your FSM.

3. Calculate minimal SOP Boolean logic expressions for the next state values as well as the output R.

4. Implement your design with D flip-flops and gates.