module project(Clk_1sec,seconds,minutes,hours); // Inputs input Clk_1sec; //Outputs output [5:0] seconds; output [5:0] minutes; output [4:0] hours; reg [5:0] seconds; reg [5:0] minutes; reg [4:0] hours; always @(posedge(Clk_1sec)) begin if(Clk_1sec == 1'b1) begin //second seconds = seconds + 1; //inc of sec if(seconds == 60) begin //max value of sec seconds = 0; //reseting the seconds minutes = minutes +1; // _minutes_ if(minutes == 60) begin //max value of min minutes = 0; //reseting minutes hours = hours + 1; // _hours_ if(hours == 24) begin //max value of hours hours = 0; //reseting of hours end else if(Clk_1sec == 1'b1) begin //second seconds = seconds + 1; //inc of sec if(seconds == 00) begin //max value of sec seconds = 0; //reseting the seconds minutes = minutes +1; // _minutes_ if(minutes == 00) begin //max value of min minutes = 0; //reseting minutes hours = hours + 1; // _hours_ if(hours == 00) begin //max value of hours hours = 0; //reseting of hours end end end end end end end end endmodule //testbunch module tb_project; reg Clk_1sec; // inputs wire [5:0] seconds;// Outputs wire [5:0] minutes; wire [4:0] hours; Digital_Clock uut ( .Clk_1sec(Clk_1sec), .reset(reset), .seconds(seconds), .minutes(minutes), .hours(hours) ); //Generating the Clock frequency initial Clk_1sec = 0; always #50000000 Clk_1sec = ~Clk_1sec; // toggle the clock every 0.5 sec endmodule this is my code for digital alarm clock the clock code but I want the code for the alarm to make all FBJA lights when it hit 09:30:00 am for this code Verilog code please