$($Moore$)$ deaw the logic gates using tubbkes flip flos and all of the other gates needed, there should be $2$ inputs and ohtluts, a CLK and RESET and make sure it follows the prompt please thank you so much $!$

The current method for maintaining the water level in a swimming pool is to connect a float to a valve. If the float is below a certain level, then the valve opens and water flows into the pool. Our company has won a contract to create an electronic pool filler that has two speeds. This specification details the requirements for the controller circuit.

There are two inputs and two outputs:

Inputs:

L: $1$ means the pool level is low and should fill slowly; $0$ means pool level is normal V : $1$ means the pool level is very low and should fill quickly; $0$ means fast fill is not needed

Outputs:

R: $0$ means slow fill valve should be off; $1$ means the slow fill valve should allow water flow F: $0$ means fast fill valve should be off; $1$ means the fast fill valve should allow water flow

There are rules that must be followed:

F may be asserted for no more than $2$ clocks and may not assert again until $V=0$ for at least one clock.

The design must have a minimum of $5$ states.

There are some items that are not specified. For example, what should be done if both L and V are $1?$ Can V be asserted for less than $2$ clocks? What if V is asserted for more than $2$ clocks? During which states can V and F assert or negate?

usignt

$Q_2=0$

$Q_2^{+}=\frac{Q_1{Q}_{0}V}{Q_2}=1$

Du

$Q_1=0$

$Q_1^{+}=$

$Q_0^t=\frac{L}{b}ar(V)\frac{+}{b}ar(Q{)}_0{Q}_{1}V$