Numerical Processing Unit (NPU) The following description is about a 4-bit Numerical Processing Unit depicts in Figure Q3 which is used for computing arithmetic operations such as addition, subtraction, etc. The NPU consists of a 4-bit Carry Look Ahead (CLA) Adder and the other digital electronic components. The relationship between present carry (Ci+) and previous carry (C) of a 4-bit CLA Adder is given by the Boolean equation 1 below. Ci+1 = G; + PC --- (equation 1) Where carry generation G = AB, carry propagation Pi = ( A bit of the CLA adder. B ). A and B are the ith input (Q3] The 4-bit NPU depicts in Figure Q3 to perform the following arithmetic operations listed in Table Q3. | Clock A[3:0] S[3:0] B[3:0) 4-bit NPU N[1:0) Figure Q3: Block diagram of the 4-bit NPU Table Q3: Arithmetic Operations Output (S) 00 A+B Function Addition Subtraction Multiplication A-B A*B Division A/B [24] (1) Write a VHDL testbench for the 4-bit NPU with the suitable input file and write the output to an output file. Clearly show the input signals with test values in the input file. (ii) Show the simulation waveforms of the 4-bit NPU for the input signals using a suitable simulator. Numerical Processing Unit (NPU) The following description is about a 4-bit Numerical Processing Unit depicts in Figure Q3 which is used for computing arithmetic operations such as addition, subtraction, etc. The NPU consists of a 4-bit Carry Look Ahead (CLA) Adder and the other digital electronic components. The relationship between present carry (Ci+) and previous carry (C) of a 4-bit CLA Adder is given by the Boolean equation 1 below. Ci+1 = G; + PC --- (equation 1) Where carry generation G = AB, carry propagation Pi = ( A bit of the CLA adder. B ). A and B are the ith input (Q3] The 4-bit NPU depicts in Figure Q3 to perform the following arithmetic operations listed in Table Q3. | Clock A[3:0] S[3:0] B[3:0) 4-bit NPU N[1:0) Figure Q3: Block diagram of the 4-bit NPU Table Q3: Arithmetic Operations Output (S) 00 A+B Function Addition Subtraction Multiplication A-B A*B Division A/B [24] (1) Write a VHDL testbench for the 4-bit NPU with the suitable input file and write the output to an output file. Clearly show the input signals with test values in the input file. (ii) Show the simulation waveforms of the 4-bit NPU for the input signals using a suitable simulator