OBJECTIVE: To design and implement a simple combinational logic circuit using integrated circuits, specifically, only AND, OR and NOT gates. The circuit you are to implement is the function F(A.B,C)-m3+m4+m6+m7 or F(A,B,C)-2(3,4,6,7), they are the same function. LAB: Designing the circuit schematic To design the circuit schematic, begin with developing the simplified SOP using the Karnaugh Map. You will be demonstrating the full design process in this lab so start with drawing your Karnaugh Map on your submission sheet. Once your map is drawn then create your SOP equation. Hint, this SOP can be done with two two-input AND gates, one two-input OR gate, and one NOT gate. From your equation the next step in planning is to draw the schematic. You will draw your schematic using only AND, OR, and NOT gates. This will help you prepare for the next step. You will be using an LED to be the indicator of if the output is 1 (the LED will be on) or 0 (the LED will be off). Remember from Lab 1 the LEDs have a polarity to them, which is recognizable in how the symbol is drawn. To keep your circuit safe you will add resistors on the inputs to your gates when they connect to power and you will have a resistor connecting from the LED to the ground. Re-draw your schematic with the resistor(s) and LED(s) drawn. 1. Draw your Karnaugh Map 2. Write the simplified SOP equation 3. Draw your logic gate schematic 4. Draw your schematic adding in a LED for the output and resistors when appropriate