Overflow condition is checked in the $1-$bit ALU for the most significant bit $($sign bit$).$Draw a detailed schematic diagram for the overflow detection component $($shown as the blank box in the above diagram$)$ using only three basic gates $(2-$input AND, $2-$input OR$,$ and negator$)\mathrm{.}2.$ Prove that the following logic for checking overflow condition is equivalent to the logic shown in #$1.$if $(\text{'}$carry$\_$in to sign$\_$bit' $!=$ 'carry$\_$out from sign$\_$bit'$)$ rarr overflow