Part 1) Write VHDL code to implement the following Boolean function. X = (A + B).(B+C). B Provide a screen capture showing the entity and architecture of your VHDL code. Do not crop your screen capture, it should show your full PC screen. Perform functional simulation of your code in such a way as to show the correct operation of the circuit for different situations. Provide a screen capture showing your functional simulation. Do not crop your screen capture, it should show your full PC screen. Complete the truth table using the FPGA development board. A A B C X 0 0 0 0 1 0 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1