$-$ PART $2-$ Design and implement $($in Logisim$)$ two synchronous Mod$-4$ counters. You need to make sure to submit the following:

A$.$ One counter is an Up Counter. You will use JK flip$-$flops only and some logic gates. You will submit the counter as a subcircuit of your First$\_$Last$\_$Lab$\_12.$circ file. You will label the subcircuit "SynchUpCount$\_4".$ In your report you will add a screenshot of the circuit and a screenshot of a table like the one in Figure $1($with the appropriate counting$).$

B$.$ One counter is a Down Counter. You will use JK flip$-$flops only and no logic gates. You will submit the counter as a subcircuit of your First$\_$Last$\_$Lab$\_12.$circ file. You will label the subcircuit "SynchDownCount$\_4".$ In your report you will add a screenshot of the circuit and a screenshot of a table like the one in Figure $1($with the appropriate counting$).$

C$.$ In your report discuss the main difference between the design of the two counters.