Question: Part 3 : Top Level Design Instantiate your up / down counter in a top - level VHDL file. Set the counter Generic parameter size

Part 3: Top Level Design
Instantiate your up/down counter in a top-level VHDL file.
Set the counter Generic parameter size to 4 bits and connect all four counter bits to the LEDs (LD3- LD0).
Instantiate 3 copies of your Switch Debouncer. Connect the Debouncer inputs to PIN B14, PIN A14, and PIN F15.
The output of the Debouncer connected to PIN F15 should be your synchronous reset to your 4-bit up/down counter.
Using the output of the Debouncers connected to PIN B14, and PIN A14, write a process (2 DFFs each) that will generate a single clock cycle wide pulse each time the button is pressed.
Each of these pulses should be used to increment or decrement your 4-bit counter.
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 Part 3: Top Level Design Instantiate your up/down counter in a

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