Part 4: Majority Detector Circuit In this part, you will design a majority detector circuit or simply called a majority circuit. A 3-input majority circuit has three input lines and one output line. The output is a 1 if and only if the number of 1's in the input is greater than the number of O's; otherwise, the output is a 0. For example, if the input is 000, the output is 0; 001, the output is 0; etc. If the input is 101, the output is a 1; and so on. Write the truth table for a 3-input majority circuit and implement it in Verilog The skeleton code is given here: https://www.edaplayground.com/x/SUB Extend it to a 4-input majority detector circuit Please save this file as majority.sv