Question: PART B: STRUCTURED 65 MARKS QUESTION 110 MARKSI a). Draw a logic circuit for the following Boolean expression below. You can only use three gates

 PART B: STRUCTURED 65 MARKS QUESTION 110 MARKSI a). Draw alogic circuit for the following Boolean expression below. You can only usethree gates with 2 input for your drawing. [3] AB + CD

PART B: STRUCTURED 65 MARKS QUESTION 110 MARKSI a). Draw a logic circuit for the following Boolean expression below. You can only use three gates with 2 input for your drawing. [3] AB + CD b). Produce a complete truth table for the following logic circuit using the header shown below. Show all your workings [4] A B B A Truth Table Header AB B (AB) 3 3 SECR1013/SCSR1013 2019/2020 - 1 c). Draw timing diagram for output X = A B in your answer booklet. Please copy and redraw the timing diagram exactly as shown below in your answer booklet. [31 A B SECR1013/SCSR1013 2019/2020 -1 AI QUESTION 618 MARKSI Design a combinational circuit that implements and analyze the following functions: [18] Multiply OUTI AD Compare OUTO B1 Circuit EQ BO E Function Multiply Multiply two decimals 2 bit numbers A1A0 and B1B0. Rules: OUTIOUTO is multiplication result between two decimals numbers in binary. OUTIOUTO is INVALID if multiplication result between two decimals numbers in binary is LARGER than 3. Function Compare Compare two decimals 2 bit numbers AIAO and BIBO. Rules: EQ set to HIGH if the two decimal numbers are equal EQ set to LOW if the two decimal numbers are different a). Using the following header, create the truth table for the combinational circuit. INPUT OUTPUT AI 0 BI BO OUTI OUTO EQ b). From the truth table above, get the simplified SOP expression for OUT1, OUTO and EQ using K-Map minimization. c). Draw circuit for OUT1 using 2 input basic gates only (AND, OR). d). Draw circuit for OUTO using 2 input basic gate only (AND). e). Draw circuit for EQ using 4 input basic gates only (AND, OR, NOT). QUESTION 4|13 MARKS] a). From Boolean expression S = (A + B)C14 i. Create and complete the truth table using the following header shown below. Show all your workings. C S ii. Get standard SOP form from the truth table above. b). For Boolean expression X = ABCD+CD+AC + D, produce SOP simplified expression using K-Map minimization Show all your workings. [5] c). Using K-Map minimization, find POS expression for the following. Show all your workings. [4 W TARCO (0,5,10,13) + d(2.7.8.15) QUESTION 5 17 MARKSI a). Convert the logic circuit below to 2 input NOR universal gate only. Show all your workings. [3] DD b). Convert and simplify the NAND only circuit below to 2 input basic gates (AND, OR NOT). Show all your workings.[4] DDE Dobo 5

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