Question: Performance comparison and speedup sider two different implementations Mi and M2 of the same inst of 500 MHz. M2's clock cycle is 1.5 ns. There

 Performance comparison and speedup sider two different implementations Mi and M2

Performance comparison and speedup sider two different implementations Mi and M2 of the same inst of 500 MHz. M2's clock cycle is 1.5 ns. There are three classes of instructions with the following CPIs: CPI for Mi CPI for M2 2 4 a. What are the peak performances of Mi and M2 expressed as MIPS? b. If the number of instructions executed in a certain program is divided equally among the three classes, which machine is faster and by what factor? c. We can redesign M2 such that with negligible cost increase, the CPI for class-B instructions improves from 2 to 1 (class-A and class-C CPIs remain unchanged). This change, however, would increase the clock cycle from 1.5 ns to 2 ns. What should the minimum percentage of class-B instructions be in an instruction mix for this redesign to result in improved performance

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