pleas answer question 3 and 4

3)(30) Gray codes have a useful property in that consecutive numbers differ in only a single bit position. Design a 3-bit modulo 8 Gray code counter FSM ( according to fsm design steps)with no inputs and three outputs. (A modulo N counter counts from 0 to N1, then repeats. For example, a watch uses a modulo 60 counter for the minutes and seconds that counts from 0 to 59.) When reset, the output should be 000. On each clock edge, the output should advance to the next Gray code. After reaching 100(binary), it should repeat with 000. 4)(40) Write Verilog code and test bench for the FSM in question 3. Deliver the verilog code ( extension .v), test bench and the simulation of the wave forms