Question: please answer as soon as possible 2. For the gives sequence of instructions, fill the table below with the pipeline stages for cach instruction IMPORTANT:
2. For the gives sequence of instructions, fill the table below with the pipeline stages for cach instruction IMPORTANT: ASSUME that due to a hardware defect AL.U takes frice the time te MULTDIV, alse "forwarding, that is the reselt ef BUS is available in the beginning of the next 2 clock eyckes. If poosible, try to roduce the namber of eycles by changing the sequesee of the eode witbou altering the opaput. How many cycles does it take to exerute his piese of code? "Yoe might necd more elock cycles
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