Please answer both:

$3.$ Comment the following assembly code to explain what each line is doing. Then in an equation, express the return value $($v$0)$ as a function of the input arguments $($a$0,$ a$1).$ new$-$proc:

blt $a$1,$ $zero, loop$2$

loop$1$:

beq $a$1,$ $zero, proc$-$end

sll $a$0,$ $a$0,1$

addi $a$1,$ $a$1,-1$

j loop$1$

loop$2$:

beq $a$1,$ $zero, proc$-$end

srl $a$0,$ $a$0,1$

addi $a$1,$ $a$1,1$

j loop$2$

proc$-$end:

add $v$0,$ $a$0,$ $zero

jr $ra

$4.$ Consider a simple single$-$stage processor design $($i$.$e$.$ no pipelining$).$ At the start of a cycle, a new instruction enters the processor and is processed completely within a single cycle. It takes $7,000$ ps to navigate all the circuits in a cycle.

a$)$ What is the minimum cycle time for this processor, or in other words, the clock speed? What is its CPI, assuming there are no stalls $($every load$/$store instruction finds its instruction$/$data in the instruction or data cache$)?$ What is its throughput $($in billion instructions per second$)?$

b$)$ The processor is now converted into a $14-$stage pipeline. The slowest of these $14$ stages takes $600$ ps$.$ What is the highest possible clock speed now? What is the CPI, again assuming no stalls $($every load$/$store instruction finds its instruction$/$data in the instruction or data cache, AND there are no stalls from data$/$control$/$structural hazards$)?$ What is the throughput of this processor $($in billion instructions per second$),$ and how much is the speedup? How much could it have been at most, and can you comment why this speedup was not achieved $($hint: $7000/14=500,$ not $600)?$