Please check my work so far and then do question $1.$ Please create the verilog code for this design that can be implemented into Vivado.

Homework for the calculator project

ECE $320$

Design a combinational $($not sequential$)$ circuit that converts a $4-$digit signed BCD number $($in the $17-$bit format, where the left most bit is the sign bit and the rest of the bits represents the absolute value$)$ to a signed binary number.

a$.$ Use hand examples to answer the following questions $($to make sure the problem is understood properly$).$ Some hand examples to help you with understanding the problem and verifying the results in the end. Pick a few of your own values.

b$.$ Input$($s$)$

i$.$ Suggestion: separate the sign and the absolute value as two inputs.

ii$.$ Name and size of the input$($s$)q,$ Simn, Abs $[15$:$0]$

c$.$ Output$($s$)$

i$.$ Range of value $-9999$ to $9999($in decimal$)$

ii$.$ How many bits are needed $16($as signed binary to cover the entire range of input value$)?$ Only use enough bits to represent the range specified above.

iii. Name and size of the output vector $$

d$.$ Input$-$output relationship. You should do a couple of hand examples to gain ideas.

e$.$ Write down a pseudo$-$code to solve this problem. Here is a hint to help you get started.

i$.$ Look at the hand examples. Do you do things differently for different values? Are there different cases you should consider separately? If so$,$ use a selection construct such as if$,$ if$-$else, or case statement.

ii$.$ You may use words to describe each of these steps.