PLEASE DO NOT COPY AND PASTE THE WRONG ANSWER FROM THE SAME PROBLEM ON the Chegg

Consider the multi-cycle processor shown in the following figure. For each instruction and the 0 stage of execution provided, show which control signals are used and what are their corresponding values. [Note: For the control signals you do not list for each answer, we will assume them to be 0 if they are critical signals for the given stage; and the critical ones will be taken as don't-cares.] cWrite Outputs MemRead Control MemWrite Op 26 PC 131-28) PC 2 ALU ALU ALUOut Read Write Instruction15-111-Ix.regster 15-0) ALU control Shift (a) beq Sr1, $r3, loop IF stage (b) sw $t1, 4(Sto) ID stage (c) j target - Completion stage (d) lw $t0, 4096(r3) - MEM stage (e) slt $r1, $r2, $r3 - WB stage 0