please i need a new solution, i know it had been solved the Quartud project must include: 1.system design 2.verilog code 3.simulation result

Q1: Given the following Combinational circuit, Use Verilog HDL on Quartus tool to LO 4 to 1 MUX Si So 2 to 1 MUX Output S2 1 12 4 to 1 MUX Si S. 1. Write a Verilog HDL code to describe the module mux4x1 // this module name must be your last name 2. Write a Verilog HDL code to describe the module mux2x1// this module name must be your first name 3. Write a Verilog HDL code to describe the whole system structurally from its subsystems // this module name must be your university number Q1: Given the following Combinational circuit, Use Verilog HDL on Quartus tool to LO 4 to 1 MUX Si So 2 to 1 MUX Output S2 1 12 4 to 1 MUX Si S. 1. Write a Verilog HDL code to describe the module mux4x1 // this module name must be your last name 2. Write a Verilog HDL code to describe the module mux2x1// this module name must be your first name 3. Write a Verilog HDL code to describe the whole system structurally from its subsystems // this module name must be your university number