1. Please note that the question and answer differs from any posted before on Chegg, please don't copy they are different. I will upvote!

2. 

Carefully study the following logic circuit (Universal Register) and answer the next 3 questions. If Reset= 1, 5150 = 11, D3D2D100=1011, Q3Q2Q1Q0 = 0100, at the next negative-edge of the clock, then binary output at Q3Q2Q1QOwillbe Blank 1. If Reset= 1, 5150 = 00, D3D2D1D0=1011, Q3Q2Q1Q0 = 0100, at the next negative-edge of the clock, then binary output at Q3Q2Q1 Qowillbe Blank 2. If Reset=0, 5150 = 11, D3D2D100=1011, Q3Q2Q1Q0 = 0100, at the next negative-edge of the clock, then binary output at Q3Q2Q1QOwillbe Blank 3. Parallel Inputs D3 D2 D D Right Serial Input Left Serial Input S- 3210 3 2102 32 102 3210 D D D D RO OR O RO RO Clock Reset Q2 li lo Parallel Outputs Blank 1 Add your answer Blank 2 Add your answer Blank 3 Add your