Please show work.

Design a logic circuit that will divide a $5-$bit binary number by $3$ to produce a $4-$bit binary

quotient. The quotient then will be displayed on a single $7-$segment display device.

Your task is to design two combinational logic circuits; a divider and a decoder as explained in

parts $1$ and $2.$ These circuits can then be interfaced to a $7-$segment display device which will

display the decimal equivalent of the quotient.

Part $1-$ Design of the Divider

Design a combinational logic circuit which will divide a $5-$bit binary number by $3$ to produce

a $4-$bit binary quotient. Assume that the input number is in the range $0$ through $27$ and that

numbers in the range $28$ through $31$ will never occur as inputs. Design your circuit with the

minimum number of gates. The inputs A$,$B$,$C$,$D$,$ and E will be available from toggle switches.

Part $2-$ Design of the $7-$segment decoder

Design a decoder that has four inputs and seven outputs. The decoder's inputs are the $4-$bit

quotient from the output of the divider. The decoder's outputs can be applied to a $7-$segment

display device as shown below.

WRITTEN COMMUNICATION USAGE:

A formal written report is required for this assignment. The formal report format will be in

accordance with the "Written Grading Guide" shown below.