Please solve the question below

Exercises: 1) Design the circuit to simulate the behavior of the following Boolean expression: a) F= (A' +B'+C)(A' +B+C)(A+B') b) F=(A'B+AB')' (use XOR gate) 2) Design the circuit to simulate the behavior of the following Boolean expression using NAND gates only. a) F=(A' +B') (C+D) (B+D') b) F(x,y,z) = 2 (1,4,5,6,7) where I is the sum of minterms and minterm is the combination of the variables in the truth table. For example, minterm 3 means 011, that is x=0, y=1 and z=1