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With a 3-bit recycle count down asynchronous binary counter, choose all the states that exist in between stale 010 and state 1102 111 001 000 101 100 B011 Which option will produce a cascaded counter with overall modulus of 602 mod 10 and mod 50 o mod 50 and mod 2 mod 3 and mod 4 and mod 5 @mod 2 and mod 3 and mod 5 NO HO 10, The figure above shows panty circuit to generate even or odd parity using Modulo 2 summation Given the binary value of ABCD 1011 Which of the following statement is TRUE about output X? OX IS LOW and the input has total bit 1 equal to ODD O XS HIGH and the input has total bil 1 equal to EVEN X is LOW and the input has total bil 1 equal to EVEN 0 X is HIGH and the input has total bit 1 equal to ODD Which of the following statements is TRUE about basic comparator circuit? XNOR gate is used to detect output of inequality input bit XOR gate is used to detect output of equality input bit Inequality comparator as to detect different input bit pattern Equality comparator can be implemented using OR gale only With a 50 Hz clock frequency, how long does it take to serially shall SIX bits into a Siso Shift register? 0012 s 00035 125 0 0.02