plz no handwriting

Question 6 [8 marks]: A computer designer decided to use an Intel 8086 CPU. The specification of the CPU is as follows: CPU clock rate - 5 MHz to 10 MHz, Data width - 16 bits, Address width - 20 bits, Package - 40 pin DIP (DIP40). The CPU pin assignments diagram is as follows. (a) From the diagram, it is observed that some of the pins in the CPU have shared usage. How are the address and data pins shared? (b) What is the maximum memory size in bytes that the computer can address? (c) To obtain the maximum memory in (b), only 64 KBytes chips can be used. How many chips are required to make the maximum memory? (d) If an instruction of the CPU has 8 bits opcodes and requires 2 operands which are both addresses, how * ?many clock cycles are required to fetch the instruction GND 1 AD14 g 2 AD13 g 3 AD12 g 4 AD11 g 5 AD1096 AD9 g 1 AD8 g 8 AD7 g 9 8086 AD6 10 CPU AD5 g 11 AD1 g 12 AD3 g 13 AD2 g 14 AD1 g 15 ADO 16 NMI g 17 INTR g 18 CLK 19 GND 20 MAX MIN MODE MODE 40 p Ucc 39 AD15 38 A16/53 37 PA17/54 36 A18/55 35 b 419/56 34 BHE/S7 33 MN/MX 32 RD 31 RO/GTO (HOLD) 30 RQ/GTI (HLDA) 29 LOCK (WR) 28 b S2 (M/10) 27 psi (DT/R) 26 so (DEN) 25 Peso (ALE) 24 si (INTA) 23 TEST 22 READY 21 P RESET