Problem 1. A sign extension unit extends a twos complement number from M to N (N > M) bits by copying the most significant bit of the input into the upper bits of the output. It receives an M-bit input A and produces an N-bit output Y. A zero extension unit extends an unsigned number from M to N bits (N > M) by putting zeros in the upper bits of the output. Use the extend.sv file as a template to implement a basic extension unit module extend for signed and zero extensions. The module has a 4-bit data input, 1-bit ext input for extension type, and 8-bit out as output. If ext = 0, the module will perform zero extension, otherwise it will perform signed extension. Usealways_comb with if-else to implement the module. You need to use bit-swizzling for the implementation. Submit the following:

Implement the extend module and list the code in the report. Simulate the module and add the screenshot of the simulation waveform in the report. RTL schematic diagram for the module.