Problem $1$: B$.$JT DC Circuits.

Let the NPN BJT QN have the following properties: $\{\begin{array}{c}{V}_{\text{B}\text{E}\text{N}}=0\mathrm{.}7(V)\end{array}$ when BE junction is $ON,=100$ and $\{$:$V_{\text{C}\text{E}\text{N}\text{s}\text{a}\text{t}}=0\mathrm{.}1(V)\}.$ Let $R_{\text{B}\text{I}\text{N}}=R_{B2N}$ and each has resistance value in the range of tens of $K.$ Lel Ren and Ren have resistance values in the range of a lew $K.$

$1.$a Choose all the resistors so that $I_{CN}=1mA$ and $V_{\text{C}\text{E}\text{N}}=3V.$ For your convenience, assume that $R_{\text{B}\text{I}\text{N}}$ and $R_{B2N}$ creale an "almost$-$voltage$-$divider". Then you can easily delermine $V_B$ and $V_E$ and chouse $R_{EV}$ to set the desired $I_{CN}$ spee and then set $R_{CN}$ to meet the $V_{\text{C}\text{E}\text{n}}$ spee. Of course, don't forget to justify the Active Mode assumption and the "almost$-$voltage$-$divider" assumption.

$1.$b Now, change one of the $R_{BN}$ resistors $($to another finite and nonzero value$)$ to drive the BJT into Saturation Mode. Once you violate the Active Mode assumption, while still keeping the BE junction forward biased, solve the circuit that now operates in Saturation Mode.

$1.$e In your design of $1.$a offer a change of one of the $R_{RN}$ resistors $($to another finite and nonzero value$)$ in order to drive the BIT into Cutoff Mode. Solve the circuit in the Cutoff Mode.

Problem $2$: BJT small$-$signal amplifier.

Let the $PN{P}^{\text{'}}BJT{Q}_P$ properties be $\{\begin{array}{c}{V}_{\text{E}\text{B}\text{P}}=0\mathrm{.}7(V)\end{array}$ if the EB junction is $ON,=100$ and Early voltage $V_A=100V$; The internal resistance of the input signal source is $R_{\text{s}\text{i}\text{g}}=200.$ The load resistance is $R_L=10K.$ You cannot change the source resistance nor the load. Let $R_{\text{B}\text{I}\text{P}}=R_{B2P}=40K.$ Let $R_{FP}=3\mathrm{.}9K$ and let $R_{rP}=3K.$

$2.$a Find the DC voltages and currents of the amplifier, the BJT$\text{'}$s small$-$signal parameters, and draw the small$-$signal diagram of the amplifier. Is the Active Mode assumption true?

$2.$b Find the amplifier's small$-$signal input resistance $R_{in}$ and the small$-$signal voltage gain.

$2.$c Find the maximum allowed amplitude of $v_{\text{s}\text{i}\text{g}}(t),$ assuming that the amplitude of the small signal $|v_{eb}(t)|$ must not exceed $10$ mV $.$

$2.$d Modify one of the resistors in order to increase the voltage gain by $20\%.$ Hint: It would be the simplest to tweak the only resistor that has nothing to do with setting the DC current $I_{Cr}.$